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SUMMARY:ESE Seminar: "Software\, Architecture\, and VLSI Co-Design for Efficient Task-Based Parallel Runtimes"
DESCRIPTION:Fast-paced changes across the computing stack are creating opportunities for innovation by bridging software\, architecture\, and VLSI. Cross-cutting research is challenging\, but it can expose key insights that would otherwise be hidden by abstractions. In this talk\, I will demonstrate a cross-stack approach to improve the efficiency of task-based parallel runtimes\, which are important because they underpin the parallelization of state-of-the-art graph analytics and machine learning frameworks. Shifting the focus downward\, I will discuss a cross-stack approach that addresses key circuit-level challenges in integrated voltage regulation. To finish the talk\, I will discuss my future plans to apply a cross-stack research approach to expand beyond the perceived limits of intelligence on the edge and also to decrease the challenges of complex ASIC design with hardware design techniques based on Lego-like tiling.
URL:https://seasevents.nmsdev7.com/event/ese-seminar-software-architecture-and-vlsi-co-design-for-efficient-task-based-parallel-runtimes/
LOCATION:Room 337\, Towne Building\, 220 South 33rd Street\, Philadelphia\, PA\, 19104\, United States
ORGANIZER;CN="Electrical and Systems Engineering":MAILTO:eseevents@seas.upenn.edu
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