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BEGIN:VCALENDAR VERSION:2.0 PRODID:-//Penn Engineering Events - ECPv6.18.0//NONSGML v1.0//EN CALSCALE:GREGORIAN METHOD:PUBLISH X-WR-CALNAME:Penn Engineering Events X-ORIGINAL-URL:https://seasevents.nmsdev7.com X-WR-CALDESC:Events for Penn Engineering Events REFRESH-INTERVAL;VALUE=DURATION:PT1H X-Robots-Tag:noindex X-PUBLISHED-TTL:PT1H BEGIN:VTIMEZONE TZID:America/New_York BEGIN:DAYLIGHT TZOFFSETFROM:-0500 TZOFFSETTO:-0400 TZNAME:EDT DTSTART:20180311T070000 END:DAYLIGHT BEGIN:STANDARD TZOFFSETFROM:-0400 TZOFFSETTO:-0500 TZNAME:EST DTSTART:20181104T060000 END:STANDARD BEGIN:DAYLIGHT TZOFFSETFROM:-0500 TZOFFSETTO:-0400 TZNAME:EDT DTSTART:20190310T070000 END:DAYLIGHT BEGIN:STANDARD TZOFFSETFROM:-0400 TZOFFSETTO:-0500 TZNAME:EST DTSTART:20191103T060000 END:STANDARD BEGIN:DAYLIGHT TZOFFSETFROM:-0500 TZOFFSETTO:-0400 TZNAME:EDT DTSTART:20200308T070000 END:DAYLIGHT BEGIN:STANDARD TZOFFSETFROM:-0400 TZOFFSETTO:-0500 TZNAME:EST DTSTART:20201101T060000 END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTART;TZID=America/New_York:20190207T110000 DTEND;TZID=America/New_York:20190207T120000 DTSTAMP:20190110T200124Z CREATED:20190110T200124Z LAST-MODIFIED:20190110T200124Z UID:1124-1549537200-1549540800@seasevents.nmsdev7.com SUMMARY:ESE Seminar: "Liquid Silicon: A New Computing Paradigm Enabled by Monolithic 3D Cross-Point Memory" DESCRIPTION:Almost every subfield of electrical engineering and computer science are undergoing disruptive times. With Moore’s Law coming to an end\, an expanded roadmap for semiconductors beyond traditional CMOS scaling becomes unclear. At the other end\, traditional application software development is being replaced by emerging machine learning techniques whose success will\, in turn\, rely on the availability of powerful\, efficient and flexible computer systems. Due to these emerging applications\, architecture is transitioning from mainstream CPU to heterogeneous and diverse options such as GPU\, TPU\, etc. The confluence of these key trends has created a wide efficiency gap\, due to the mismatch between emerging application requirements and the relatively slow evolutionary improvements in existing CMOS-based computer hardware. \nTo close the gap\, in this talk\, I will present a reconfigurable memory-oriented computing fabric\, namely Liquid Silicon (L-Si) by leveraging the monolithic 3D stacking capability of RRAM. L-Si addresses several key fundamental limitations of state-of-the-art reconfigurable architectures including FPGA\, etc. in supporting emerging data-/search-intensive applications (e.g.\, machine learning and neural networks) through a series of innovations. It\, for the first time\, extends the configuration capabilities of existing reconfigurable architectures (FPGA\, CGRA) from computation to the whole spectrum\, from full memory to full computation\, or intermediate states in between (partial memory and partial computation). Thus\, it allows users more flexibility in customizing hardware to better match an application’s characteristics\, for higher performance and energy efficiency. The talk will consist of four parts\, technology\, architecture\, compiler tool\, and algorithm\, with a combined EE and CS flavor. URL:https://seasevents.nmsdev7.com/event/ese-seminar-liquid-silicon-a-new-computing-paradigm-enabled-by-monolithic-3d-cross-point-memory/ LOCATION:Room 337\, Towne Building\, 220 South 33rd Street\, Philadelphia\, PA\, 19104\, United States CATEGORIES:Seminar ORGANIZER;CN="Electrical and Systems Engineering":MAILTO:eseevents@seas.upenn.edu END:VEVENT END:VCALENDAR