There have been few high-impact deployments of hardware implementations of cryptographic primitives. 
We present the benefits and challenges of hardware acceleration of sophisticated cryptographic primitives 
and protocols, and describe our recent design work in accelerating Fully Homomorphic Encryption by three 
to four orders of magnitude using programmable hardware accelerators. We argue the significant potential 
for synergistic codesign of cryptography and hardware, where customized hardware accelerates cryptographic 
protocols that are designed with hardware acceleration in mind.

Joint work with Daniel Sanchez's group at MIT.