Current computing systems are mainly constructed on the von Neumann architecture, where data needs to be transferred to a processing unit from memory components. The latency associated with accessing data from the memory units is a key performance bottleneck for a range of data-intensive applications in the convergence of big data and AI. Several solutions have been proposed to mitigate and overcome this bottleneck, with a prominent one being placing memory and logic units in close physical proximity. While significant progress has been made along those lines at both technology and architecture levels, a transformative approach would be to implement arithmetic kernels precisely where the data are stored using memory devices. This is known as compute-in-memory (CIM).

In this dissertation, I will begin by presenting the most recent advancements in the CMOS-compatible ferroelectric memory technologies on aluminum nitride platform. Second, I will present a reconfigurable CIM system on field-programmable ferroelectric diodes in a transistor-free architecture, allowing for multiple essential data operations. Last, I will discuss the conceptualization and demonstration of a programmable parallel search architecture – analog content-addressable memory (ACAM) on complementary Si-CMOS ferroelectric field-effect-transistor memory. The deployment and acceleration of deep neural network and kernel regression on ACAM will also be presented.