The compute demands of AI and robotics continue to rise due to the rapidly growing volume of data to be processed; the increasingly complex algorithms for higher quality of results; and the demands for energy efficiency and real-time performance. In this talk, we will discuss the design of efficient tailored hardware accelerators and the co-design of algorithms and hardware that reduce the energy consumption while delivering swift real-time and robust performance for applications including deep neural networks, data analytics with sparse tensor algebra, and autonomous navigation. Throughout the talk, we will highlight important design principles, methodologies, and tools that can facilitate an effective design process and various forms of co-design that can broaden the design space.

*Distinguished lecture supported by the IEEE Solid-State Circuits Society